Macro is_x86_feature_detected 

macro_rules! is_x86_feature_detected {
    ("tsc") => { ... };
    ("msr") => { ... };
    ("apic") => { ... };
    ("cx16") => { ... };
    ("pcid") => { ... };
    ("x2apic") => { ... };
    ("tsc_deadline") => { ... };
    ("xsave") => { ... };
    ("hypervisor") => { ... };
    ("arat") => { ... };
    ("intel_thread_director") => { ... };
    ("fsgsbase") => { ... };
    ("tsc_adjust") => { ... };
    ("smep") => { ... };
    ("invpcid") => { ... };
    ("smap") => { ... };
    ("la57") => { ... };
    ("rdpid") => { ... };
    ("hybrid") => { ... };
    ("lass") => { ... };
    ("nmi_src") => { ... };
    ("xsave_x87") => { ... };
    ("xsave_sse") => { ... };
    ("xsave_avx") => { ... };
    ("xsave_avx512_opmask") => { ... };
    ("xsave_avx512_zmm_hi256") => { ... };
    ("xsave_avx512_zmm_hi16") => { ... };
    ("xsave_pkru") => { ... };
    ("xsave_amx_cfg") => { ... };
    ("xsave_amx_tile_data") => { ... };
    ("xsave_apx_gpr") => { ... };
    ("nx") => { ... };
    ("pdpe1gb") => { ... };
    ("rdtscp") => { ... };
    ("extapic") => { ... };
    ("invlpgb") => { ... };
    ($t:tt,) => { ... };
    ($t:tt) => { ... };
}

Available on x86 or x86-64 only.

Returns a bool if the current system supports the requested feature

The features available to test are:

• tsc - system has a timestamp counter accessible through rdtsc
• msr - system supports reading and writing model specific registers through rdmsr and wrmsr
• apic - system has an APIC
• cx16 - system support 16-byte atomics
• pcid - system supports PCIDs in page tables
• x2apic - APIC supports x2APIC features
• tsc_deadline - local APIC timer supports TSC deadline mode
• xsave - system supports the xsave instruction
• hypervisor - system is running in a hypervisor
• arat - local APIC timer continues counting while sleeping
• intel_thread_director - system supports Intel Thread Director
• fsgsbase - system supports writing to the fs and gs registers from userspace
• tsc_adjust - system supports adjusting TSC value per-core
• smep - system supports Supervisor Mode Execution Prevention
• invpcid - system supports invalidating an entire PCID from the TLB
• smap - system supports Supervisor Mode Access Prevention
• la57 - system supports 57-bit virtual addresses
• rdpid - system supports reading OS core ID from IA32_TSC_AUX
• hybrid - system has AMP
• lass - system supports trapping access based on MSB of address
• nmi_src - system supports reporting source of NMI exceptions
• xsave_x87 - system supports saving x87 registers with xsave
• xsave_sse - system supports saving SSE registers with xsave
• xsave_avx - system supports saving AVX registers with xsave
• xsave_avx512_opmask - system supports saving AVX512 opmask registers with xsave
• xsave_avx512_zmm_hi256 - system supports saving upper 256 bits of zmm0 through zmm15 with xsave
• xsave_avx512_zmm_hi16 - system supports saving zmm16 through zmm31 with xsave
• xsave_pkru - system supports saving PKRU register with xsave
• xsave_amx_cfg - system supports saving AMX tilecfg register with xsave
• xsave_amx_tile_data - system supports saving AMX tmm0 through tmm7 registers with xsave
• xsave_apx_gpr - system supports saving r16 through r31 GPRs with save
• nx - page tables support no-execute bit
• pdpe1gb - page tables support 1 GiB huge pages
• rdtscp - system supports rdtscp instruction to read TSC and IA32_TSC_AUX
• extapic - APIC support Extended APIC Space
• invlpgb - system supports invlpgb instruction